Subject basically says it all -- I'm building a project for the TinyFPGA BX, but it has a 16MHz clock by default. I need at least 25.145MHz, and the on-chip PLL is the way to get it. Problem is, I don't know how to do that in nMigen, and as far as I can tell anywhere on the Internet, nobody else knows either.
So, why post here? TinyFPGA BX uses the same iCE40 family FPGA (LP instead of HX, but otherwise equally supported by Yosys, et. al.), so it was recommended that I ask here as well. So if anyone here has ever used one of the iCE40 PLLs with their nMigen project for the BlackIce family of boards, that should translate perfectly to my project as well.
Anyone have any thoughts? Thanks.